A Low Power Recycling Folded Cascode OTA for Medical Applications

Abstract

A low power recycling folded cascode OTA which utilizes a novel CMRR magnifier block (CMRFC OTA) is presented in this paper. Incorporating the CMRR magnifier block helps to yield higher CMRR values while eliminating cascode structure. DC bias voltage of the cascode stage is eliminated accordingly. This interestingly leads to a low voltage low power design. The bias current is reduced in the proposed OTA which effectively reduces power consumption. A satisfactory phase margin is achieved for presented OTA which can be further improved incorporating the compensation resistor to isolate NMOS current mirrors parasitic capacitors. Low power CMRFC amplifier is simulated in 180nm CMOS technology with a 1.5 v supply voltage. The simulation results prove better performance of the structure in comparison with other works. The proposed OTA has a gain and phase margin of 54.1dB and 87.16 degree, respectively. The bias current and power consumption are 7.2 μA and 8.45 μw, respectively.